| 电网技术 2010, 34(7) 9-13 DOI: ISSN: 1000-3673 CN: 11-2410/TM | |||||||||||||||||||||||||||||||||||
| 本期目录 | 下期目录 | 过刊浏览 | 高级检索 [打印本页] [关闭] | |||||||||||||||||||||||||||||||||||
| 国家重点基础研究项目 |
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| 合成试验方法在VSC-HVDC换流阀短路电流试验中的应用 | |||||||||||||||||||||||||||||||||||
| 罗湘,汤广福,查鲲鹏,贺之渊,高冲 | |||||||||||||||||||||||||||||||||||
| 中国电力科学研究院,北京市 海淀区 100192 | |||||||||||||||||||||||||||||||||||
| 摘要:
合成试验方法是用多套电源分别提供试品在试验中所需应力的试验方法。为检验由模块化多电平换流器(modular multi-level converter,MMC)构成的电压源换流器高压直流输电(voltage source converter based high voltage direct current,VSC-HVDC)换流阀设计的正确性及其对暂态工况应力的耐受性,研究了MMC阀暂态运行试验的试验方法,分析了与过电流关断试验和短路电流试验相关工况的应力,提出了2种等效试验方法,并将合成试验方法应用于试验电路的设计中,给出了试验电路与实际工况下阀的应力波形,结合关键应力等效性分析,验证了上述试验方法和试验电路的正确性和有效性。 | |||||||||||||||||||||||||||||||||||
| 关键词: | |||||||||||||||||||||||||||||||||||
| Application of Synthetic Test Method in Short-Circuit Current Tests for Voltage Source Converter Based High Voltage Direct Current Valves | |||||||||||||||||||||||||||||||||||
| LUO Xiang ,TANG Guang-fu ,ZHA Kun-peng ,HE Zhi-yuan ,GAO Chong | |||||||||||||||||||||||||||||||||||
| China Electric Power Research Institute, Haidian District, Beijing 100192, China | |||||||||||||||||||||||||||||||||||
| Abstract:
Synthetic test method is such a test approach, which provides required stresses for test sample under different operational conditions during the operation test respectively by multi-sets of power suppliers. To examine the design validity of converter valve in voltage source converter-based high voltage direct current (VSC-HVDC) based on modular multi-level converter (MMC) and its stress tolerance under transient operation condition, an approach to perform transient state operation test for valves in MMC is researched. The stresses related to overcurrent turn-off test and short-circuit current test are analyzed, then two equivalent test methods are proposed and synthetic test method is applied in the design of testing circuit and then the stress waveforms of testing circuit and that under practical operation conditions are given. Combining with the analysis on equivalence of key stresses, the correctness and effectiveness of above-mentioned test method and testing circuit are verified. | |||||||||||||||||||||||||||||||||||
| Keywords: | |||||||||||||||||||||||||||||||||||
| 收稿日期 2010-05-26 修回日期 2009-06-15 网络版发布日期 2010-07-13 | |||||||||||||||||||||||||||||||||||
| DOI: | |||||||||||||||||||||||||||||||||||
| 基金项目:
国家重点基础研究发展计划项目(973项目)(2004CB- 217907)。 | |||||||||||||||||||||||||||||||||||
| 通讯作者: 罗湘 | |||||||||||||||||||||||||||||||||||
| 作者简介: | |||||||||||||||||||||||||||||||||||
| 作者Email: lucky@epri.sgcc.com.cn | |||||||||||||||||||||||||||||||||||
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| 参考文献: | |||||||||||||||||||||||||||||||||||
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